In high speed communication systems, there is a growing concern regarding implementation constraints as well as lowering the power consumption of the transceivers. Thus, being able to provide satisfactory performance with the lowest possible implementation complexity is increasingly important. In coherent communication systems, for example, an accurate estimate of the channel is required for proper functioning of the system. However, system resources are heavily expended on such overhead tasks if the channel needs to be estimated often or uses several pilot symbols. Furthermore, in several communication systems the received signal is conditioned in several stages. For example, in dual-polarization coherent optical systems, compensation for chromatic dispersion and polarization mode dispersion is performed in multiple stages to reduce implementation complexity. Various linear equalization techniques as applicable to coherent optical transceivers are described in Institute of Electrical and Electronic Engineers (IEEE) publication entitled “Block-Wise Digital Signal Processing for PolMux QAM/PSK Optical Coherent Systems”, IEEE Journal of Lightwave Technology, Vol. 29, No. 20. October 2011, which is incorporated by reference herein as if reproduced in its entirety. Conventional linear equalization techniques may be unable to sufficiently compensate for ISI in systems employing high symbol transmission rates. The residual ISI remaining after conventional linear equalization may significantly degrade system performance when decoding of each symbol is done independently. A multiple-symbol equalization approach may be one alternative for high baud rate systems, but may require several implementation optimizations in order to be acceptable for high speed lower power designs. Additionally, linear equalization is known to be susceptible to noise enhancement in the presence of non-negligible ISI. Thus, systems and methods that facilitate low-complexity means of estimating such residual ISI, and consequently the use of limited memory multi-symbol equalizers, are important for future high data rate communication system design.